Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design
Identifieur interne : 002B10 ( Main/Repository ); précédent : 002B09; suivant : 002B11Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design
Auteurs : RBID : Pascal:11-0468099Descripteurs français
- Pascal (Inist)
- Endommagement, Transistor bipolaire hétérojonction, Contrainte électrique, Modèle électrique, Vieillissement, Conception circuit, Fiabilité, Densité élevée, Courant intense, Collecteur, Densité courant, Jonction collecteur base, Jonction émetteur base, Courant continu, Gain courant, Conception assistée, Modélisation, Conception compacte, Défaillance, Phosphure d'indium, Composé binaire, InP.
English descriptors
- KwdEn :
- Ageing, Base collector junction, Base emitter junction, Binary compound, Circuit design, Collector, Compact design, Computer aided design, Current density, Current gain, Damaging, Direct current, Electric stress, Electrical model, Failures, Heterojunction bipolar transistors, High density, High strength current, Indium phosphide, Modeling, Reliability.
Abstract
The reliability of InP/InGaAs DHBT under high collector current densities and low junction temperatures is analyzed and modeled. From the Gummel characteristics, we observe several types of device degradation, resulting from the long term changes of base and collector current in both lower and higher base-emitter voltage ranges which impacts the reduction of DC current gain. In this paper, we investigate the underlying physical mechanism of base and collector current degradation with the help of TCAD device simulation. We chose the HICUM model level2 for the modeling purpose to evaluate the drift of model parameters according to stress time. The evolution of the model parameters is described with suitable equations to achieve a physics based compact electrical aging model. The aging laws and the parameter evolution equations with stress time are implemented in compact electrical aging model which allows us to simulate the impact of device failure mechanisms on the circuit in operating conditions.
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Pascal:11-0468099Le document en format XML
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Grandchamp</name><affiliation wicri:level="4"><inist:fA14 i1="01"><s1>Laboratoire IMS, Universite de Bordeaux, CNRS UMR 5218, 351, Cours de la liberation</s1><s2>33405 Talence</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ><sZ>5 aut.</sZ><sZ>6 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Aquitaine</region><settlement type="city">Talence</settlement></placeName><orgName type="university">Université de Bordeaux</orgName></affiliation></author><author><name sortKey="Kone, G A" uniqKey="Kone G">G. A. Kone</name><affiliation wicri:level="4"><inist:fA14 i1="01"><s1>Laboratoire IMS, Universite de Bordeaux, CNRS UMR 5218, 351, Cours de la liberation</s1><s2>33405 Talence</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ><sZ>5 aut.</sZ><sZ>6 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Aquitaine</region><settlement type="city">Talence</settlement></placeName><orgName type="university">Université de Bordeaux</orgName></affiliation></author><author><name sortKey="Marc, F" uniqKey="Marc F">F. Marc</name><affiliation wicri:level="4"><inist:fA14 i1="01"><s1>Laboratoire IMS, Universite de Bordeaux, CNRS UMR 5218, 351, Cours de la liberation</s1><s2>33405 Talence</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ><sZ>5 aut.</sZ><sZ>6 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Aquitaine</region><settlement type="city">Talence</settlement></placeName><orgName type="university">Université de Bordeaux</orgName></affiliation></author><author><name sortKey="Maneux, C" uniqKey="Maneux C">C. Maneux</name><affiliation wicri:level="4"><inist:fA14 i1="01"><s1>Laboratoire IMS, Universite de Bordeaux, CNRS UMR 5218, 351, Cours de la liberation</s1><s2>33405 Talence</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ><sZ>5 aut.</sZ><sZ>6 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Aquitaine</region><settlement type="city">Talence</settlement></placeName><orgName type="university">Université de Bordeaux</orgName></affiliation></author><author><name sortKey="Zimmer, T" uniqKey="Zimmer T">T. Zimmer</name><affiliation wicri:level="4"><inist:fA14 i1="01"><s1>Laboratoire IMS, Universite de Bordeaux, CNRS UMR 5218, 351, Cours de la liberation</s1><s2>33405 Talence</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ><sZ>5 aut.</sZ><sZ>6 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Aquitaine</region><settlement type="city">Talence</settlement></placeName><orgName type="university">Université de Bordeaux</orgName></affiliation></author><author><name sortKey="Nodjiadjim, V" uniqKey="Nodjiadjim V">V. Nodjiadjim</name><affiliation wicri:level="3"><inist:fA14 i1="02"><s1>III-V Lab, Joint lab: Bell Labs, Thales Research and Technology and CEA-LETI, Route de Nozay</s1><s2>91461 Marcoussis</s2><s3>FRA</s3><sZ>7 aut.</sZ><sZ>8 aut.</sZ><sZ>9 aut.</sZ><sZ>10 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Île-de-France</region><settlement type="city">Marcoussis</settlement></placeName></affiliation></author><author><name sortKey="Riet, M" uniqKey="Riet M">M. Riet</name><affiliation wicri:level="3"><inist:fA14 i1="02"><s1>III-V Lab, Joint lab: Bell Labs, Thales Research and Technology and CEA-LETI, Route de Nozay</s1><s2>91461 Marcoussis</s2><s3>FRA</s3><sZ>7 aut.</sZ><sZ>8 aut.</sZ><sZ>9 aut.</sZ><sZ>10 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Île-de-France</region><settlement type="city">Marcoussis</settlement></placeName></affiliation></author><author><name sortKey="Dupuy, J Y" uniqKey="Dupuy J">J.-Y. Dupuy</name><affiliation wicri:level="3"><inist:fA14 i1="02"><s1>III-V Lab, Joint lab: Bell Labs, Thales Research and Technology and CEA-LETI, Route de Nozay</s1><s2>91461 Marcoussis</s2><s3>FRA</s3><sZ>7 aut.</sZ><sZ>8 aut.</sZ><sZ>9 aut.</sZ><sZ>10 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Île-de-France</region><settlement type="city">Marcoussis</settlement></placeName></affiliation></author><author><name sortKey="Godin, J" uniqKey="Godin J">J. Godin</name><affiliation wicri:level="3"><inist:fA14 i1="02"><s1>III-V Lab, Joint lab: Bell Labs, Thales Research and Technology and CEA-LETI, Route de Nozay</s1><s2>91461 Marcoussis</s2><s3>FRA</s3><sZ>7 aut.</sZ><sZ>8 aut.</sZ><sZ>9 aut.</sZ><sZ>10 aut.</sZ></inist:fA14><country>France</country><placeName><region type="region" nuts="2">Île-de-France</region><settlement type="city">Marcoussis</settlement></placeName></affiliation></author></titleStmt><publicationStmt><idno type="inist">11-0468099</idno><date when="2011">2011</date><idno type="stanalyst">PASCAL 11-0468099 INIST</idno><idno type="RBID">Pascal:11-0468099</idno><idno type="wicri:Area/Main/Corpus">002676</idno><idno type="wicri:Area/Main/Repository">002B10</idno></publicationStmt><seriesStmt><idno type="ISSN">0026-2714</idno><title level="j" type="abbreviated">Microelectron. reliab.</title><title level="j" type="main">Microelectronics and reliability</title></seriesStmt></fileDesc><profileDesc><textClass><keywords scheme="KwdEn" xml:lang="en"><term>Ageing</term><term>Base collector junction</term><term>Base emitter junction</term><term>Binary compound</term><term>Circuit design</term><term>Collector</term><term>Compact design</term><term>Computer aided design</term><term>Current density</term><term>Current gain</term><term>Damaging</term><term>Direct current</term><term>Electric stress</term><term>Electrical model</term><term>Failures</term><term>Heterojunction bipolar transistors</term><term>High density</term><term>High strength current</term><term>Indium phosphide</term><term>Modeling</term><term>Reliability</term></keywords><keywords scheme="Pascal" xml:lang="fr"><term>Endommagement</term><term>Transistor bipolaire hétérojonction</term><term>Contrainte électrique</term><term>Modèle électrique</term><term>Vieillissement</term><term>Conception circuit</term><term>Fiabilité</term><term>Densité élevée</term><term>Courant intense</term><term>Collecteur</term><term>Densité courant</term><term>Jonction collecteur base</term><term>Jonction émetteur base</term><term>Courant continu</term><term>Gain courant</term><term>Conception assistée</term><term>Modélisation</term><term>Conception compacte</term><term>Défaillance</term><term>Phosphure d'indium</term><term>Composé binaire</term><term>InP</term></keywords></textClass></profileDesc></teiHeader><front><div type="abstract" xml:lang="en">The reliability of InP/InGaAs DHBT under high collector current densities and low junction temperatures is analyzed and modeled. From the Gummel characteristics, we observe several types of device degradation, resulting from the long term changes of base and collector current in both lower and higher base-emitter voltage ranges which impacts the reduction of DC current gain. In this paper, we investigate the underlying physical mechanism of base and collector current degradation with the help of TCAD device simulation. We chose the HICUM model level2 for the modeling purpose to evaluate the drift of model parameters according to stress time. The evolution of the model parameters is described with suitable equations to achieve a physics based compact electrical aging model. The aging laws and the parameter evolution equations with stress time are implemented in compact electrical aging model which allows us to simulate the impact of device failure mechanisms on the circuit in operating conditions.</div></front></TEI><inist><standard h6="B"><pA><fA01 i1="01" i2="1"><s0>0026-2714</s0></fA01><fA02 i1="01"><s0>MCRLAS</s0></fA02><fA03 i2="1"><s0>Microelectron. reliab.</s0></fA03><fA05><s2>51</s2></fA05><fA06><s2>9-11</s2></fA06><fA08 i1="01" i2="1" l="ENG"><s1>Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design</s1></fA08><fA09 i1="01" i2="1" l="ENG"><s1>Proceedings of the 22nd European Symposium on the Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2011)</s1></fA09><fA11 i1="01" i2="1"><s1>GHOSH (S.)</s1></fA11><fA11 i1="02" i2="1"><s1>GRANDCHAMP (B.)</s1></fA11><fA11 i1="03" i2="1"><s1>KONE (G. A.)</s1></fA11><fA11 i1="04" i2="1"><s1>MARC (F.)</s1></fA11><fA11 i1="05" i2="1"><s1>MANEUX (C.)</s1></fA11><fA11 i1="06" i2="1"><s1>ZIMMER (T.)</s1></fA11><fA11 i1="07" i2="1"><s1>NODJIADJIM (V.)</s1></fA11><fA11 i1="08" i2="1"><s1>RIET (M.)</s1></fA11><fA11 i1="09" i2="1"><s1>DUPUY (J.-Y.)</s1></fA11><fA11 i1="10" i2="1"><s1>GODIN (J.)</s1></fA11><fA12 i1="01" i2="1"><s1>LABAT (N.)</s1><s9>ed.</s9></fA12><fA12 i1="02" i2="1"><s1>MARC (F.)</s1><s9>ed.</s9></fA12><fA14 i1="01"><s1>Laboratoire IMS, Universite de Bordeaux, CNRS UMR 5218, 351, Cours de la liberation</s1><s2>33405 Talence</s2><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ><sZ>3 aut.</sZ><sZ>4 aut.</sZ><sZ>5 aut.</sZ><sZ>6 aut.</sZ></fA14><fA14 i1="02"><s1>III-V Lab, Joint lab: Bell Labs, Thales Research and Technology and CEA-LETI, Route de Nozay</s1><s2>91461 Marcoussis</s2><s3>FRA</s3><sZ>7 aut.</sZ><sZ>8 aut.</sZ><sZ>9 aut.</sZ><sZ>10 aut.</sZ></fA14><fA15 i1="01"><s1>IMS, University of Bordeaux</s1><s3>FRA</s3><sZ>1 aut.</sZ><sZ>2 aut.</sZ></fA15><fA20><s1>1736-1741</s1></fA20><fA21><s1>2011</s1></fA21><fA23 i1="01"><s0>ENG</s0></fA23><fA43 i1="01"><s1>INIST</s1><s2>9626</s2><s5>354000191260520610</s5></fA43><fA44><s0>0000</s0><s1>© 2011 INIST-CNRS. All rights reserved.</s1></fA44><fA45><s0>11 ref.</s0></fA45><fA47 i1="01" i2="1"><s0>11-0468099</s0></fA47><fA60><s1>P</s1><s2>C</s2></fA60><fA61><s0>A</s0></fA61><fA64 i1="01" i2="1"><s0>Microelectronics and reliability</s0></fA64><fA66 i1="01"><s0>GBR</s0></fA66><fC01 i1="01" l="ENG"><s0>The reliability of InP/InGaAs DHBT under high collector current densities and low junction temperatures is analyzed and modeled. From the Gummel characteristics, we observe several types of device degradation, resulting from the long term changes of base and collector current in both lower and higher base-emitter voltage ranges which impacts the reduction of DC current gain. In this paper, we investigate the underlying physical mechanism of base and collector current degradation with the help of TCAD device simulation. We chose the HICUM model level2 for the modeling purpose to evaluate the drift of model parameters according to stress time. The evolution of the model parameters is described with suitable equations to achieve a physics based compact electrical aging model. The aging laws and the parameter evolution equations with stress time are implemented in compact electrical aging model which allows us to simulate the impact of device failure mechanisms on the circuit in operating conditions.</s0></fC01><fC02 i1="01" i2="X"><s0>001D03F04</s0></fC02><fC03 i1="01" i2="X" l="FRE"><s0>Endommagement</s0><s5>01</s5></fC03><fC03 i1="01" i2="X" l="ENG"><s0>Damaging</s0><s5>01</s5></fC03><fC03 i1="01" i2="X" l="SPA"><s0>Deterioración</s0><s5>01</s5></fC03><fC03 i1="02" i2="3" l="FRE"><s0>Transistor bipolaire hétérojonction</s0><s5>02</s5></fC03><fC03 i1="02" i2="3" l="ENG"><s0>Heterojunction bipolar transistors</s0><s5>02</s5></fC03><fC03 i1="03" i2="X" l="FRE"><s0>Contrainte électrique</s0><s5>03</s5></fC03><fC03 i1="03" i2="X" l="ENG"><s0>Electric stress</s0><s5>03</s5></fC03><fC03 i1="03" i2="X" l="SPA"><s0>Tensión eléctrica</s0><s5>03</s5></fC03><fC03 i1="04" i2="X" l="FRE"><s0>Modèle électrique</s0><s5>04</s5></fC03><fC03 i1="04" i2="X" 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l="SPA"><s0>Unión emisor base</s0><s5>13</s5></fC03><fC03 i1="14" i2="X" l="FRE"><s0>Courant continu</s0><s5>14</s5></fC03><fC03 i1="14" i2="X" l="ENG"><s0>Direct current</s0><s5>14</s5></fC03><fC03 i1="14" i2="X" l="SPA"><s0>Corriente contínua</s0><s5>14</s5></fC03><fC03 i1="15" i2="X" l="FRE"><s0>Gain courant</s0><s5>15</s5></fC03><fC03 i1="15" i2="X" l="ENG"><s0>Current gain</s0><s5>15</s5></fC03><fC03 i1="15" i2="X" l="SPA"><s0>Ganancia corriente</s0><s5>15</s5></fC03><fC03 i1="16" i2="X" l="FRE"><s0>Conception assistée</s0><s5>16</s5></fC03><fC03 i1="16" i2="X" l="ENG"><s0>Computer aided design</s0><s5>16</s5></fC03><fC03 i1="16" i2="X" l="SPA"><s0>Concepción asistida</s0><s5>16</s5></fC03><fC03 i1="17" i2="X" l="FRE"><s0>Modélisation</s0><s5>17</s5></fC03><fC03 i1="17" i2="X" l="ENG"><s0>Modeling</s0><s5>17</s5></fC03><fC03 i1="17" i2="X" l="SPA"><s0>Modelización</s0><s5>17</s5></fC03><fC03 i1="18" i2="X" l="FRE"><s0>Conception compacte</s0><s5>18</s5></fC03><fC03 i1="18" i2="X" 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III-V</s0><s5>20</s5></fC07><fN21><s1>325</s1></fN21><fN44 i1="01"><s1>OTO</s1></fN44><fN82><s1>OTO</s1></fN82></pA><pR><fA30 i1="01" i2="1" l="ENG"><s1>European Symposium on the Reliability of Electron Devices, Failure Physics and Analysis (ESREF 2011)</s1><s2>22</s2><s3>Bordeaux FRA</s3><s4>2011-10-03</s4></fA30></pR></standard></inist></record>Pour manipuler ce document sous Unix (Dilib)
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